The current electronic technology is exploring the stack structure having a plurality of vertically stacked semiconductor members. In conjunction with the stack structure, the process of manufacturing semiconductor chips involves the steps of slicing a high purity silicon single crystal ingot into a wafer, forming a desired circuit pattern on the front surface of the wafer to form an integrated circuit, grinding the back surface of the wafer by means of a grinding machine to a wafer thickness of about 25 to 200 μm, perforating holes through the wafer, forming therein electrodes, known as through-silicon-via (TSV), and connecting TSV electrodes in vertical direction for thereby increasing the degree of integration.
Prior to the utilization of TSV, in the step of forming a circuit on a silicon substrate, it is unnecessary to carefully check whether or not the back surface of the substrate is damaged and contaminated because the circuit is only on the front surface. In the TSV structure wherein circuits are formed and connected on both the front and back surfaces, it becomes necessary to protect one surface when the other surface is processed. The protecting member used in this step is required to have heat resistance, pressure resistance and chemical resistance. It is additionally required that the protecting member can be easily removed at the end of processing.
In this application, bonding force and pressure resistance are critical. Specifically, the protecting member must be bonded to a wafer or substrate without leaving gaps, and have sufficient bonding force and pressure resistance to withstand the subsequent steps. At the end of processing, the protecting member can be smoothly stripped from the wafer or substrate without leaving any resin residues, resin components or additive components on the substrate surface.
Thus far, efforts have been made on the resin compositions and surface protective films for protecting wafer surface. For example, Patent Document 1 discloses a surface protective film intended for wafer back grinding which may be debonded with the aid of UV. Once the film is bonded to the front surface of a wafer, the back surface may be ground while the front surface (e.g., circuit) is protected. UV is irradiated for removal, which means that the stripping step is cumbersome, or an expensive UV irradiation equipment is necessary. The increased expense of the step is detrimental. Patent Document 2 discloses a surface protective tape intended for wafer back grinding which does not use UV for removal. This tape is specialized for front surface protection during back surface grinding. The tape has a strong bonding force so that the tape is not separated even under heavy impacts during the back surface grinding. This in turn means that the tape is difficult to strip, suggesting the risk that the thin wafer can be broken when the tape is stripped therefrom. Since the tape is intended for back surface grinding, the use of a solvent other than water is not expected. If a solvent is used, adhesive components in the tape can be dissolved or altered. There is a possibility that the tape is incidentally or difficultly stripped from the wafer surface. For an application other than the back surface grinding, a protective film for use during etching is disclosed in Patent Document 3. This protective film has chemical resistance during etching. The film includes a thin pressure-sensitive adhesive layer, which is difficult to bury irregularities (e.g., circuits and through-holes) on the substrate surface.